Category Archives: Simulation

Memory-centric microarchitecture visualization

Posted on 08/14/2013 by

Visualization is a key part of microarchitectural analysis. Visualization is necessary because even the simplest in-order processor is incredibly complex; its performance may be affected by cache misses, branch mispredictions, pipeline stalls, DRAM contention, inaccurate prefetching, and so on. In … Continue reading →

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Frequency scaling for simulator debugging

Posted on 06/09/2013 by

While working on a recent paper, I stumbled on an easy way to find errors in a computer architecture simulator. I simulated a processor at various frequencies and plotted the resulting performance. I expected to see a nice “smooth” set of points, perhaps … Continue reading →

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